IEEE Design and Test of Computers, Jan/Feb 2008

Written by BlueFox on 9:17:00 AM

Design & Test of RFIC Chips
- Design and Analysis of a Transversal Filter RFIC in SiGe Technology.
- Design of a Low-Noise UWB Transceiver SiP.
- Decreasing Test Qualification Time in AMS and RF Systems.
- Light-Enhanced FET Switch Improves ATE RF Power Settling.

Networks on Chips
Time-Division-Multiplexed Test Delivery for NoC Systems.

Dynamic Power Management
Low-Impact Processor for Dynamic Runtime Power Management.

PDF | 6.9 MB

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IEEE Design and Test of Computers, Mar/Apr 2008

Written by BlueFox on 9:16:00 AM

The Current State of Test Compression
- Progress in test compression.
- Historical perspective on scan compression.
- VirtualScan: Test compression technology using combinational logic and one-pass ATPG.
- UMC-Scan Test Methodology: Exploiting the maximum freedom of multicasting.
- Hierarchical test compression for SoC designs.

Design and Test of RFIC Chips
- Loopback DFT for low-cost test of single-VCO-based wireless transceivers.
- Wireless system for microwave test signal generation.

Error Tolerance
An illustrated methodology for analysis of error tolerance.

PDF | 6.1 MB

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